Suyash Mahar

github link email me | cv

I'm a first year PhD student at UCSD's CSE department with interest in Persistent Memories and their applications. I'm advised by Prof. Steven Swanson.

I also sometimes write posts in a notebook-style blog at the notebook.

Projects

In the past, I have worked on stuff like:
  • Making persistent memory systems fast and reliable at UVa
  • Wear leveling in resistive memories at Technion
  • Energy estimation of DDR3 DRAM DIMMs at CMU
  • FPGA based FIB lookups in Named Data Network at IITR

Publications

S. Liu*, Suyash Mahar*, B. Ray, S. Khan
PMFuzz: Test Case Generation for Persistent Memory Programs
International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS'21)
* = Equal contribution author
[Abstract] [GitHub]
L. Yavits, L. Orosa, Suyash Mahar, J. Ferreira, O. Mutlu., R. Ginosar, M. Erez
WoLFRaM: Enhancing Wear-Leveling and Fault Tolerance in Resistive Memories Using Programmable Address Decoders
International Conference on Computer Design (ICCD'20)
[PDF] [GitHub]
D. Saxena, Suyash Mahar, V. Raychoudhury, J. Cao
Scalable, High-speed On-chip-based NDN Name Forwarding using FPGA
International Conference on Distributed Computing and Networking (ICDCN'19)
[ACM]


Technical Reports

Reducing DRAM Power Consumption by Exploring and Modeling Memory Access Scheduling Policies
Poster, CMU ECE Undergraduate research symposium, July 27, 2018
[pdf]
Sidharth Thomas, Suyash Mahar
Implementation of CORDIC Algorithms in FPGA
Short-term project, Summer 2017 - May 2, 2017 to May 28, 2017
[pdf]

Fun stuff around the web

Python like STL container printing in C++
Convert C-gibberrish to English and back
Software Folklore

Other stuff

A (very) short presentation on DRAM